1. Field of the Invention
The present invention relates in general to digital computer systems, and more particularly to cache memory systems.
2. Description of the Prior Art
Cache memories are used in many computer systems to improve system performance. A cache memory is a relatively small, fast memory, which resides between a central processor and main system memory. Whenever the processor reads the contents of a memory location which is stored in the cache memory, the time required to access such location is drastically reduced. A good cache technique can provide a "hit ratio" of well over ninety percent, meaning that no main memory access is necessary for over ninety percent of the read operations performed. Access of data which is stored in the cache can improve access times by factors of three to ten times.
A cache performs functions requiring two different types of memory. The first type is the data memory, in which the data is actually stored. The second type is known as a cache tag memory or cache tag RAM, which is used to determine which memory locations are actually stored in the cache. In general, the cache tag RAM contains a plurality of entries corresponding to the entries of the data cache. Each entry is indexed by some number of least significant bits of the address generated by the central processor, with the tag entry itself containing the most significant bits of the memory address location which is stored in the corresponding data cache entry. If the most significant bits stored in the cache tag match the most significant bits of the address currently being generated, with the least significant bits of this address acting as an index to the tag RAM, a cache "hit" has occurred and the data to be read may be taken from the corresponding data cache entry. If data corresponding to the desired address is not located in the data cache, the tag entry will not match the most significant bits of the address, and a "miss" occurs. This indicates that the data must be retrieved from main system memory and placed into the data cache. At this time, the current contents of the cache tag entry are overwritten with the most significant bits of the newly retrieved address.
More information on cache memories may be found in Stone, High-Performance Computer Architecture, Addison-Wesley Publishing Co. (1987).
It would be desirable to provide a cache tag memory which operates faster and more efficiently than designs currently available.